CVE-2022-50370

MEDIUMNVD 5.55.5
EchelonGraph scoreMEDIUM confidence

Score 5.5 from GitHub Security Advisory published 2025-09-17. NVD baseline CVSS 5.5; sources differ by 0.0.

Triggered by: GitHub Security Advisory CVSS
Sources: epss, ghsa, nvd
Trending — 3 sources updated this week
5.5EG
EchelonGraph verdictMonitorLow exploitation likelihood right now — keep watching.
  • Lower severity and no public exploit yet
CISA-KEV: Not listedEPSS PROB: 0%CVSS: 5.5Exploit: None knownExposed: 0

No vendor fix yet — apply a workaround or compensating control (WAF / firewall / segmentation) and watch for a patch.

In the Linux kernel, the following vulnerability has been resolved:

i2c: designware: Fix handling of real but unexpected device interrupts

Commit c7b79a752871 ("mfd: intel-lpss: Add Intel Alder Lake PCH-S PCI IDs") caused a regression on certain Gigabyte motherboards for Intel Alder Lake-S where system crashes to NULL pointer dereference in i2c_dw_xfer_msg() when system resumes from S3 sleep state ("deep").

I was able to debug the issue on Gigabyte Z690 AORUS ELITE and made following notes:

  • Issue happens when resuming from S3 but not when resuming from
"s2idle"
  • PCI device 00:15.0 == i2c_designware.0 is already in D0 state when
system enters into pci_pm_resume_noirq() while all other i2c_designware PCI devices are in D3. Devices were runtime suspended and in D3 prior entering into suspend
  • Interrupt comes after pci_pm_resume_noirq() when device interrupts are
re-enabled
  • According to register dump the interrupt really comes from the
i2c_designware.0. Controller is enabled, I2C target address register points to a one detectable I2C device address 0x60 and the DW_IC_RAW_INTR_STAT register START_DET, STOP_DET, ACTIVITY and TX_EMPTY bits are set indicating completed I2C transaction.

My guess is that the firmware uses this controller to communicate with an on-board I2C device during resume but does not disable the controller before giving control to an operating system.

I was told the UEFI update fixes this but never the less it revealed the driver is not ready to handle TX_EMPTY (or RX_FULL) interrupt when device is supposed to be idle and state variables are not set (especially the dev->msgs pointer which may point to NULL or stale old data).

Introduce a new software status flag STATUS_ACTIVE indicating when the controller is active in driver point of view. Now treat all interrupts that occur when is not set as unexpected and mask all interrupts from the controller.

CVSS v3
5.5
EG Score
5.5(medium)
EG Risk
25(Track)
EG Risk 25/100SSVC: Track

EG Risk is EchelonGraph's 0–100 priority score: it fuses intrinsic severity with real-world exploitation and automatability so you can rank equal-severity CVEs and fix the most dangerous first. Higher = act sooner. Distinct from the 0–10 EG Score (severity).

How it’s computed
Severity55% × 45%
Exploitation0% × 40%
Automatability0% × 15%
Action: Routine — remediate on your standard cadence.
EPSS PROB
0%
EPSS %ILE
9%
KEV
Not listed

Published

September 17, 2025

Last Modified

January 14, 2026

Patch Availability(1)

Vendor / EcosystemFixed in / PatchReleasedSource
linuxKernel @ 5.15.75osv

Patches are aggregated from vendor advisories (Red Hat, Microsoft, Cisco, GitHub) and package ecosystems (OSV, GHSA). Multiple rows for the same upstream release have been deduplicated.

Weakness Classification(1)

MITRE Common Weakness Enumeration — the root-cause categories this CVE belongs to.

Data Freshness Timeline

(refreshed 13× in last 7d / 44× in last 30d)

Each row is a source pipeline that fetched or updated this CVE on that date, with what changed. For example, "NVD update" means NVD published or revised its analysis for this CVE; "MITRE cvelistV5" means we ingested or refreshed it from the CNA feed. Most recent first.

  1. 2026-07-26 14:52 UTCEPSS rescore
  2. 2026-07-26 14:52 UTCEPSS rescore
  3. 2026-07-25 14:16 UTCEPSS rescore
  4. 2026-07-24 14:15 UTCEPSS rescore
  5. 2026-07-23 19:41 UTCOSV refresh
  6. 2026-07-23 14:16 UTCEPSS rescore
  7. 2026-07-23 14:16 UTCEPSS rescore
  8. 2026-07-23 02:17 UTCEG score recompute
  9. 2026-07-22 23:04 UTCEG score recompute
  10. 2026-07-22 14:06 UTCEPSS rescore
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  1. 2026-07-13 22:28 UTCEPSS rescore
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  11. 2026-07-06 16:25 UTCEPSS rescore
  12. 2026-07-06 14:11 UTCOSV refresh
  13. 2026-07-06 02:21 UTCEPSS rescore
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  40. 2026-06-18 02:35 UTCOSV refresh
  41. 2026-06-17 17:51 UTCEPSS rescore
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  43. 2026-06-16 17:51 UTCEPSS rescore
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  45. 2026-06-15 17:47 UTCEPSS rescore
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  50. 2026-06-11 13:58 UTCEPSS rescore
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  73. 2026-05-29 22:34 UTCEG score recompute
  74. 2026-05-29 22:34 UTCGHSA enrichment
  75. 2026-05-29 13:43 UTCEPSS rescore

Frequently asked(5)

What is CVE-2022-50370?
CVE-2022-50370 is a medium vulnerability published on September 17, 2025. In the Linux kernel, the following vulnerability has been resolved: i2c: designware: Fix handling of real but unexpected device interrupts Commit c7b79a752871 ("mfd: intel-lpss: Add Intel Alder Lake PCH-S PCI IDs") caused a regression on certain Gigabyte motherboards for Intel Alder Lake-S where…
When was CVE-2022-50370 disclosed?
CVE-2022-50370 was first published in the National Vulnerability Database on September 17, 2025, with the most recent update on January 14, 2026. EchelonGraph re-ingests CVE updates from NVD on a 2-hour cycle, so this page reflects the latest published state.
Is CVE-2022-50370 actively exploited?
CVE-2022-50370 is not currently on CISA's Known Exploited Vulnerabilities catalog. FIRST EPSS estimates a 0% probability of exploitation in the next 30 days, which ranks it in the top 91.2% of all scored CVEs.
What is the CVSS score of CVE-2022-50370?
CVE-2022-50370 has a CVSS v3 base score of 5.5 (NVD).
How do I remediate CVE-2022-50370?
Patch to the fixed version published by the affected vendor. Where vendor advisories exist for CVE-2022-50370, EchelonGraph cross-links them in the Vendor Advisories panel below — those typically contain the canonical remediation steps, fixed version numbers, and any vendor-specific mitigations.

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